UT54ACTS273 Datasheet | Unknown Manufacturer

FEATURES Contains eight flip-flops with single-rail outputs Buffered clock and direct clear inputs Individual data input to each flip-flop Applications include: .. - Buffer/storage registers, shift registers, and pattern generators radiation-hardened CMOS - Latchup immune High speed Low power consumption Single 5 volt supply Available QML Q or V processes Flexible package - 20-pin DIP - 20-lead flatpack DESCRIPTION The UT54ACS273 and the UT54ACTS273 are positive-edgetriggered D-type flip-flops with a direct clear input. Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output. The devices are characterized over full military temperature range of -55 C to +125 C. FUNCTION TABLE INPUTS CLR L H H H L CLK X Dx X H L X OUTPUTS PINOUTS 20-Pin DIP Top View CLR 1Q 1D 2D 2Q 3Q 3D 4D 4Q VSS 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VDD 8Q 8D 7D 7Q 6Q 6D 5D 5Q CLK 20-Lead Flatpack Top View CLR 1Q 1D 2D 2Q 3Q 3D 4D 4Q VSS 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VDD 8Q 8D 7D 7Q 6Q 6D 5D 5Q CLK LOGIC SYMBOL Qx L H L No change CLR CLK 1D 2D 3D 4D 5D 6D 7D 8D (1) (11) (3) (4) (7) (8) (13) (14) (17) (18) R C1 (2) 1D (5) (6) 1Q 2Q 3Q (9) 4Q (12) 5Q (15) 6Q (16) 7Q (19) 8Q Note: 1. Logic symbol in accordance with ANSI/IEEE standard 91-1984 and IEC Publication 617-12. Rad Hard MSI Logic UT54ACS273/UT54ACTS273 LOGIC DIAGRAM 1D (3) 2D (4) 3D (7) 4D (8) 5D (13) 6D (14) 7D (17) 8D (18) (11) D C R CLR (1) (2) (5) 2Q (6) 3Q (9) 4Q (12) 5Q (15)...