N2DS12H16CT Overview
The 128Mb DDR SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits. It is internally configured as a quad-bank DRAM. The 128Mb DDR SDRAM uses a double-data-rate architecture to achieve high-speed operation.
N2DS12H16CT Key Features
- 6K also meets DDR266A Spec (MHz-CL-t RCD-tRP = 133-2.5-3-3) CAS Latency
- Double data rate architecture: two data transfers per clock cycle
- Bidirectional data strobe (DQS) is transmitted and received with data, to be used in capturing data at the receiver
- DQS is edge-aligned with data for reads and is centeraligned with data for writes
- Differential clock inputs (CK and CK)