N2DS12H16CT - 128Mb DDR SDRAM

Description

The 128Mb DDR SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits.

It is internally configured as a quad-bank DRAM.

The 128Mb DDR SDRAM uses a double-data-rate architecture to achieve high-speed operation.

Features

CAS Latency and Frequency Maximum Operating Frequency (MHz).
DDR400 DDR333 DDR266B (-5/-5T) (-6K).
(-75B) 2.5 166 133 100 3 200 166 133.
-6K also meets DDR266A Spec (MHz-CL-t RCD-tRP = 133-2.5-3-3) CAS Latency.
Double data rate architecture: two data transfers per clock cycle.
Bidirectional data strobe (DQS) is tran.

Elixir

📥 Download Datasheet

Datasheet Details

Part number	N2DS12H16CT
Manufacturer	Elixir
File Size	2.49 MB
Description	128Mb DDR SDRAM
Datasheet	N2DS12H16CT Datasheet
Additional preview pages of the N2DS12H16CT datasheet.

📁 Similar Datasheet

Other Datasheets by Elixir

N2DS51216DS - 512Mb DDR SDRAM

Full PDF Text Transcription

Click to expand full text

N2DS12H16CT 128Mb DDR SDRAM Features CAS Latency and Frequency Maximum Operating Frequency (MHz)* DDR400 DDR333 DDR266B (-5/-5T) (-6K)* (-75B) 2.5 166 133 100 3 200 166 133 * -6K also meets DDR266A Spec (MHz-CL-t RCD-tRP = 133-2.5-3-3) CAS Latency • • • • • • • • • • • • • • • • Double data rate architecture: two data transfers per clock cycle • Bidirectional data strobe (DQS) is transmitted and received with data, to be used in capturing data at the receiver • DQS is edge-aligned with data for reads and is centeraligned with data for writes • Differential clock inputs (CK and CK) www.DataSheet4U.

Published: Aug 5, 2008 |