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PRELIMINARY DATA SHEET
512MB Unbuffered DDR SDRAM DIMM
EBD52EC8AKFA-5 (64M words × 72 bits, 2 Ranks)
Description
The EBD52EC8AKFA is 64M words × 72 bits, 2 ranks Double Data Rate (DDR) SDRAM unbuffered module, mounting 18 pieces of 256M bits DDR SDRAM sealed in TSOP package. Read and write operations are performed at the cross points of the CK and the /CK. This high-speed data transfer is realized by the 2 bits prefetch-pipelined architecture. Data strobe (DQS) both for read and write are available for high speed and reliable data bus design. By setting extended mode register, the on-chip Delay Locked Loop (DLL) can be set enable or disable. This module provides high density mounting without utilizing surface mount technology.