EBE21RD4AEFA Overview
The EBE21RD4AEFA is a 256M words × 72 bits, 2 ranks DDR2 SDRAM Module, mounting 36 pieces of 512M bits DDR2 SDRAM sealed in FBGA (µBGA) package. Read and write operations are performed at the cross points of the CK and the /CK. This highspeed data transfer is realized by the 4bits prefetchpipelined architecture.
EBE21RD4AEFA Key Features
- 240-pin socket type dual in line memory module (DIMM) PCB height: 30.0mm Lead pitch: 1.0mm Lead-free
- Power supply: VDD, VDDQ = 1.8V ± 0.1V
- Data rate: 533Mbps/400Mbps (max.)
- SSTL_18 patible I/O
- Double-data-rate architecture: two data transfers per clock cycle
- Bi-directional, data strobe (DQS and /DQS) is transmitted /received with data, to be used in capturing data at the recei
- DQS is edge aligned with data for READs; center aligned with data for WRITEs
- Differential clock inputs (CK and /CK)
- DLL aligns DQ and DQS transitions with CK transitions
- mands entered on each positive CK edge; data referenced to both edges of DQS