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EDE1116AJBG - 1G bits DDR2 SDRAM

This page provides the datasheet information for the EDE1116AJBG, a member of the EDE1108AJBG 1G bits DDR2 SDRAM family.

Product Overview

Elpida Memory

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EDE1116AJBG 1G bits DDR2 SDRAM by Elpida Memory - Datasheet Preview — Datasheet preview – EDE1116AJBG

Datasheet Details

Part number	EDE1116AJBG
Manufacturer	Elpida Memory
File Size	537.89 KB
Description	1G bits DDR2 SDRAM
Datasheet	EDE1116AJBG Datasheet
Additional preview pages of the EDE1116AJBG datasheet.

EDE1116AJBG Product details

Features

Double-data-rate architecture; two data transfers per clock cycle.
The high-speed data transfer is realized by the 4 bits prefetch pipelined architecture.
Bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the receiver.
DQS is edge-aligned with data for READs; centeraligned with data for WRITEs.
Differential clock inputs (CK and /CK).
DLL aligns DQ and DQS transitions with CK transi.

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Other Datasheets by Elpida Memory

EDE1116AJBG-8E-F - 1G bits DDR2 SDRAM
EDE1104AASE - (EDE1104AASE / EDE1108AASE) 1G bits DDR2 SDRAM organized
EDE1108AASE - (EDE1104AASE / EDE1108AASE) 1G bits DDR2 SDRAM organized
EDE1108AJBG - 1G bits DDR2 SDRAM
EDE1108AJBG-8E-F - 1G bits DDR2 SDRAM
EDE5104ABSE - 512M bits DDR2 SDRAM
EDE5104AESK - (EDE510xAESK) 512M bits DDR2 SDRAM
EDE5104AGSE - (EDE510xAGSE) 512M bits DDR2 SDRAM

Published: Oct 13, 2014 |