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EDJ4208EFBG - 512M words x 8 bits 4G bits DDR3L SDRAM

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Elpida Memory

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EDJ4208EFBG 512M words x 8 bits 4G bits DDR3L SDRAM by Elpida Memory - Datasheet Preview — Datasheet preview – EDJ4208EFBG

Datasheet Details

Part number	EDJ4208EFBG
Manufacturer	Elpida Memory
File Size	392.78 KB
Description	512M words x 8 bits 4G bits DDR3L SDRAM
Datasheet	EDJ4208EFBG Datasheet
Note	This datasheet PDF includes multiple part numbers: EDJ4208EFBG, EDJ4204EFBG. Please refer to the document for exact specifications by model.
Additional preview pages of the EDJ4208EFBG datasheet.

Product details

Features

Double-data-rate architecture: two data transfers per clock cycle.
The high-speed data transfer is realized by the 8 bits prefetch pipelined architecture.
Bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the receiver.
DQS is edge-aligned with data for READs; centeraligned with data for WRITEs.
Differential clock inputs (CK and /CK).
DLL aligns DQ and DQS transitions with CK transi.

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Other Datasheets by Elpida Memory

EDJ4204EFBG - 1024M words x 4 bits 4G bits DDR3L SDRAM
EDJ4216EFBG - 256M words x 16 bits 4G bits DDR3L SDRAM
EDJ1108DBSE - 128M words x 8 bits 1G bits DDR3 SDRAM
EDJ1108DJBG - 1G bits DDR3 SDRAM
EDJ1116DBSE - 64M words x 16 bits 1G bits DDR3 SDRAM
EDJ1116DJBG - 1G bits DDR3 SDRAM

Published: Jul 14, 2015 |