Elpida Memory HM5259805B-75
The HM5259165B is a 512-Mbit SDRAM organized as 8388608-word × 16-bit × 4 bank. The HM5259805B is a 512-Mbit SDRAM organized as 16777216-word × 8-bit × 4 bank. The HM5259405B is a 512-Mbit SDRAM organized as 33554432-word × 4-bit × 4 bank.DESCRIPTION
All inputs and outputs are referred to the rising edge of the clock input. It is packaged in standard 54-pin plastic TSOP II.FEATURES
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● 3.3 V power supply Clock frequency: 133 MHz/100 MHz (max) LVTTL interface Single pulsed RAS 4 banks can operate simultaneously and independently Burst read/write operation and burst read/single write operation capability Programmable burst length: 1/2/4/8 2 variations of burst sequence Sequential (BL = 1/2/4/8) Interleave (BL = 1/2/4/8) Elpida Memory, Inc. is a joint venture DRAM company of NEC Corporation and Hitachi, Ltd. HM5259165B/HM5259805B/HM5259405B-75/A6
● Programmable CAS latency: 2/3
● Byte control by DQM : DQM (HM5259805B/HM5259405B) : DQMU/DQML (HM5259165B)
● Refresh cycles: 8192 refresh cycles/32 ms
● 2 variations of refresh Auto refresh Self refresh Ordering Information Type No. HM5259165BTD-75* HM5259165BTD-A6 1 Frequency 133 MHz 100 MHz 133 MHz 100 MHz 133 MHz 100 MHz CAS latency 3 2/3 3 2/3 3 2/3 Package 400-mil 54-pin plastic TSOP II (TTP-54DA) HM5259805BTD-75* 1 HM5259805BTD-A6 HM5259405BTD-75* 1 HM5259405BTD-A6 Notes: 1.