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eorex
EM42BM3284LBA
Revision History
Revision 0.1 (Oct. 2007) - Preliminary release.
Revision 0.2 (Mar. 2008).. - Modify package thickness spec from 1.2mm to 1.4mm. - add 166/333Mhz @CL3 speed.
Revision 0.3 (Oct. 2008).. - Modify package thickness to 1.2mm.. - Improve ICCs spec.
Revision 0.4 (Feb. 2009).. - Release. ( none Preliminary)
Feb. 2009
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eorex
EM42BM3284LBA
1Gb (8M×4Bank×32) Double DATA RATE SDRAM
Features
• Internal Double-Date-Rate architecture with 2 Accesses per clock cycle. • 1.8V ±0.1V VDD/VDDQ • 1.8V LV-COMS compatible I/O • Burst Length (B/L) of 2, 4, 8, 16 • 3 Clock read latency • Bi-directional,intermittent data strobe(DQS) • All inputs except data and DM are sampled at the positive edge of the system clock.