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Revision History
Revision 0.1 (Feb. 2011) -First release.
Revision 0.2 (Jan.2013) -Add speed 1066.
EM44DM0888LBA
Feb. 2012
1/29
www.eorex.com
EM44DM0888LBA
1Gb (16M×8Bank×8) Double DATA RATE 2 SDRAM
Features
• JEDEC Standard VDD/VDDQ = 1.8V±0.1V. • All inputs and outputs are compatible with SSTL_18
interface. • Fully differential clock inputs (CK, /CK) operation. • Eight Banks • Posted CAS • Bust length: 4 and 8. • Programmable CAS Latency (CL): 6 & 7 • Programmable Additive Latency (AL): 0, 1, 2, 3, 4,
5 & 6. • Write Latency (WL) =Read Latency (RL) -1. • Read Data Strobe (RDQS) supported • Bi-directional Differential Data Strobe (DQS). • Data inputs on DQS centers when write. • Data outputs on DQS, /DQS edges when read.