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EM63A325 - 8M x 32 bit Synchronous DRAM

Description

Table 3.

CLK Input Clock: CLK is driven by the system clock.

All SDRAM input signals are sampled on the positive edge of CLK.

Features

  • Fast access time from clock: 4.5/5/5.4 ns.
  • Fast clock rate: 200/166/143MHz.
  • Fully synchronous operation.
  • Internal pipelined architecture.
  • 2M word x 32-bit x 4-bank.
  • Programmable Mode registers - CAS Latency: 2, or 3 - Burst Length: 1, 2, 4, 8, or full page - Burst Type: Sequential or Interleaved - Burst stop function.
  • Auto Refresh and Self Refresh.
  • 4096 refresh cycles/64ms.
  • CKE power down mode.
  • Single +3.3V ± 0.3V power supply.
  • Operating Te.

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Datasheet Details

Part number EM63A325
Manufacturer Etron Technology
File Size 696.51 KB
Description 8M x 32 bit Synchronous DRAM
Datasheet download datasheet EM63A325 Datasheet
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Full PDF Text Transcription

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EtronTech EM63A325 8M x 32 bit Synchronous DRAM (SDRAM) Advance (Rev. 2.1, Aug. /2016) Features  Fast access time from clock: 4.5/5/5.4 ns  Fast clock rate: 200/166/143MHz  Fully synchronous operation  Internal pipelined architecture  2M word x 32-bit x 4-bank  Programmable Mode registers - CAS Latency: 2, or 3 - Burst Length: 1, 2, 4, 8, or full page - Burst Type: Sequential or Interleaved - Burst stop function  Auto Refresh and Self Refresh  4096 refresh cycles/64ms  CKE power down mode  Single +3.3V ± 0.3V power supply  Operating Temperature: TA = 0~70°C  Interface: LVTTL  86-pin 400 mil plastic TSOP II package - Pb free and Halogen free  90-ball 8 x 13 x 1.
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