EP504 Datasheet PDF (AHB Bus to SDRAM Controller)

EP504 - AHB Bus to SDRAM Controller

Description

The AHB bus SDRAM controller provides high speed SDRAM for the system.

Features

SDRAM controller interfaces directly with AHB Bus and user interface.
Built-in arbitration between two access ports.
Second access port allows memory sharing with user logic devices.
Dual write buffer for simultaneous write posting and SDRAM access.
Dedicated read buffer with data width matching.
Early burst termination and CPU master busy on the AHB bus are supported.
Supports AHB bus data width of 8, 16 and 32 bits.

Datasheet Details

Part number	EP504
Manufacturer	Eureka
File Size	84.56 KB
Description	AHB Bus to SDRAM Controller
Datasheet	EP504 Datasheet
Additional preview pages of the EP504 datasheet.

📁 Similar Datasheet

EP5352Q - (EP5352Q - EP5382Q) 500/600/800mA Synchronous Buck Regulators (Enpirion)

EP5358HUA - 600mA PowerSoC Voltage Mode Synchronous PWM Buck (ALTERA)

EP5358HUI - 500mA Synchronous Buck Regulator (Enpirion)

EP5358LUA - 600mA PowerSoC Voltage Mode Synchronous PWM Buck (ALTERA)

EP5358LUI - 500mA Synchronous Buck Regulator (Enpirion)

EP5362Q - (EP5352Q - EP5382Q) 500/600/800mA Synchronous Buck Regulators (Enpirion)

EP5368QI - 600mA Synchronous Buck Regulator (Enpirion)

EP5382Q - (EP5352Q - EP5382Q) 500/600/800mA Synchronous Buck Regulators (Enpirion)

EP5388QI - 800mA Synchronous Buck Regulator (Enpirion)

EP53A8HQA - 1A PowerSoC Voltage Mode Synchronous PWM Buck (Altera)

Full PDF Text Transcription

Click to expand full text

www.DataSheet4U.com Eureka Technology EP504 AHB Bus to SDRAM Controller Product Summary FEATURES • SDRAM controller interfaces directly with AHB Bus and user interface. • Built-in arbitration between two access ports. • Second access port allows memory sharing with user logic devices. • Dual write buffer for simultaneous write posting and SDRAM access. • Dedicated read buffer with data width matching. • Early burst termination and CPU master busy on the AHB bus are supported. • Supports AHB bus data width of 8, 16 and 32 bits. • Zero wait state burst data transfer on both AHB interface and SDRAM. • Operates on both discrete SDRAM chips and PC100/133 SDRAM DIMM. • Supports industrial standard SDRAM from 64Mbit to 256Mbit device sizes.

Published: Mar 13, 2007 |