EP504 Description
Eureka Technology EP504 AHB Bus to SDRAM Controller Product Summary.
EP504 Key Features
- SDRAM controller interfaces directly with AHB Bus and user interface
- Built-in arbitration between two access ports
- Second access port allows memory sharing with user logic devices
- Dual write buffer for simultaneous write posting and SDRAM access
- Dedicated read buffer with data width matching
- Early burst termination and CPU master busy on the AHB bus are supported
- Supports AHB bus data width of 8, 16 and 32 bits
- Zero wait state burst data transfer on both AHB interface and SDRAM
- Operates on both discrete SDRAM chips and PC100/133 SDRAM DIMM
- Supports industrial standard SDRAM from 64Mbit to 256Mbit device sizes