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ES7201 - High Performance PDM Stereo Audio ADC

Datasheet Summary

Description

ES7201/2 AINLN 10 AINLP 11 REFQ 12 RESETb 1 DATA 2 CLOCK 3 ES7201 9 VDD 8 GND 7 REFP 6 AINRN 5 AINRP 4 VOLT Pin Name DATA, CLOCK RESETb VOLT AINLP, AINLN AINRP, AINRN VDD, GND REFP REFQ Pin number 2, 3 1 4 11,10 5, 6 9, 8 7 12 Input or Output I, O I I I I I O O Pin Description PDM clock an

Features

  • High performance advanced deltasigma audio ADC.
  • 100 dB signal to noise ratio.
  • -85 dB THD+N.
  • Low noise PGA.
  • 8 to 48 kHz sampling frequency.
  • Low power.

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Datasheet preview – ES7201

Datasheet Details

Part number ES7201
Manufacturer Everest Semiconductor
File Size 512.88 KB
Description High Performance PDM Stereo Audio ADC
Datasheet download datasheet ES7201 Datasheet
Additional preview pages of the ES7201 datasheet.

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Full PDF Text Transcription

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18938047300 ES7201/2 High Performance PDM Stereo Audio ADC FEATURES • High performance advanced deltasigma audio ADC • 100 dB signal to noise ratio • -85 dB THD+N • Low noise PGA • 8 to 48 kHz sampling frequency • Low power APPLICATIONS • Mic Array • Soundbar • Audio Interface • Digital TV • A/V Receiver • DVR • NVR ORDERING INFORMATION ES7201 -40°C ~ +85°C QFN-12 ES7202 -40°C ~ +85°C QFN-16 BLOCK DIAGRAM (ES7201, HARDWARE MODE) AINLP/AINLN AINRP/AINRN Advanced Delta-sigma DSP Modulator Clock Manager Reset RESETb PDM Data Interface DATA CLOCK 1 Everest Semiconductor Confidential BLOCK DIAGRAM (ES7202, I2C MODE) ES7201/2 AINLP/AINLN AINRP/AINRN Advanced Delta-sigma Modulator Clock Manager Reset RESETb PDM DATA DSP Data Interface CLOCK I2C Interface CCLK CDATA AD0 A
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