• Part: ST16C650A
  • Description: 2.90V TO 5.5V UART WITH 32-BYTE FIFO
  • Manufacturer: Exar
  • Size: 666.95 KB
Download ST16C650A Datasheet PDF
Exar
ST16C650A
ST16C650A is 2.90V TO 5.5V UART WITH 32-BYTE FIFO manufactured by Exar.
DESCRIPTION The ST16C650A1 (650A) is a 2.90 to 5.5 volt Universal Asynchronous Receiver and Transmitter (UART) with 5 volt tolerant inputs. This device supports Intel and PC ISA mode data bus interfaces and is software patible to industry standard 16C450, 16C550, ST16C580 and ST16C650A UARTs. The 650A has 32 bytes of TX and RX FIFOs and is capable of operating up to serial data rates of 3.125 Mbps at 5 volt supply voltage. The internal registers include the 16C550 register set plus Exar’s enhanced registers for additional features to support today’s highly demanding data munication needs. The enhanced features include automatic hardware and software flow control, selectable TX and RX trigger levels, and wireless infrared (Ir DA) encoder/decoder. The device provides a new capability to give user the ability to program the wireless infrared encoder output pulse width, hence reducing the power consumption of a handheld unit. The ST16C650A device es in the 44-pin PLCC and 48-pin TQFP packages in both the mercial and industrial temperature ranges. NOTE: 1 Covered by US patents #5,649,122. FEATURES Added features in top mark date code of "HC YYWW" and newer: s s s s s s s 2.90 to 5.5 Volt Operation 5 Volt Tolerant Inputs Automatic RS485 Half-Duplex Control Output Programmable Infrared Encoder Pulse Width Sleep Mode with Wake-up Indicator Device ID & Revision Up to 3.125 Mbps Data Rate at 5 Volts Added feature in top mark date code of "I2 YYWW" and newer: s 0 ns address hold time - Intel or PC Mode 8-bit Bus Interface - 32-byte Transmit and Receive FIFOs - Automatic Hardware (RTS/CTS) Flow Control - Hardware Flow Control Hysteresis - Automatic Software (Xon/Xoff) Flow Control APPLICATIONS - Battery Operated Electronics - Handheld Terminal - Personal Digital Assistants - Cellular Phones Data Port - Wireless Infrared Data munications Systems FIGURE 1. BLOCK DIAGRAM RESET 32 Byte TX FIFO A2:A0 Transmitter D7:D0 IOR# IOR IOW# IOW CS2# CS1 CS0 INT TXRDY# RDRDY# DDIS# BRG...