XRT95L51 Datasheet | Exar

DESCRIPTION The XRT95L51 is an ATM/PPP physical layer processor with integrated SONET OC-48/STM-16 framing controller. ATM direct mapping and cell delineation are supported, as are PPP mapping and frame processing. The XRT95L51 contains an integral SONET framer which provides framing and error accumulation in accordance with ANSI/ITU-T specifications. The configuration of this device is done through internal registers accessible via 8-bit parallel, memory mapped, microprocessor interface. The XRT95L51 provides full section, line and path overhead processing and supports scrambling/descrambling, alarm signal insertion/detection and bit interleaved parity processing. The SONET/SDH transmit and receive blocks are used to transmit/receive an OC-48c/STM-16c signal or pose and depose four OC-12/12c signals.The blocks operate at a peak internal clock speed of 77 MHz and support 32-bit internal data paths. The transmit and receive blocks are pliant with both SONET and SDH standards. APPLICATIONS - Digital Cross Connect Systems - ATM Switches - Routers - SONET/SDH Add Drop Multiplexers - Multiplexers FEATURES - Single chip for ATM UNI and Packet over SONET. - Generates and terminates SONET section, line and path layers. - Provides SONET frame scrambling and descrambling. - Provides 32-bit data UTOPIA level II and III multi PHY interface and POS-PHY interface. - 8-bit microprocessor interface - Includes ATM cell or PPP packet mapping - Single +3.3V power supply with +5V input tolerance - -40°C to +85°C Operating Temperature Range - Available in a 388 pin PBGA package FIGURE 1. BLOCK DIAGRAM OF THE 95L51 OC-48 ATM UNI/POS/MAPPER IC 7[32+ 7[32+&ON 7[32+)3 7[32+,16 - 3,27[6%4'$7$>:=3@ 7[6%5'$7$>:=3@ 7[6%6'$7$>:=3@ 7[- )&27[6%7'$7$>:=3@ S$''5>7=3@ S'$7$>:=3@ S$/(2$6 S:5B/ S5'B/ S&6B/ S'%(1B/ S$&.>4=3@ S5'<B/ S5(4B/>4=3@ S7<3(>5=3@ S&/. S,17B/ Microprocessor Interface 7[/&ON#.20 7[/'$7$>48=3@#.20 7[/357<#.20 7[/)3#.20 7[/567B/#.20 7[/&ON2#.20 7[5()&ON 5[/&ON#.20 5[/'$7$>48=3@#.20...