Datasheet Summary
WAN Clock for T1 and E1 Systems
October 2001-1
GENERAL DESCRIPTION The XRT8001 WAN Clock is a dual-phase-locked loop chip that generates two very low jitter output clock signals that can be used for synchronization clocks in wide area networking systems. The XRT8001 has preprogrammed multipliers and dividers that are selected via the serial port. It generates two integer multiples of 8kHz, 56kHz, and 64kHz while locked onto an ining reference of 1.54MHz (T1), 2.048MHz (E1), 8kHz, 56kHz, or 64kHz The XRT8001 WAN Clock can be configured to operate in one of six modes: 1. The Forward/Master Mode 2. The Reverse/Master Mode 3. The “Fractional T1/E1" Reverse/Master Mode 4. The “E1 to...