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Dual P‐Channel Logic Level Enhancement Mode Field Effect Transistor
Product Summary:
BVDSS
‐30V
RDSON (MAX.)
7.8mΩ
ID
‐24A
UIS, Rg 100% Tested Pb‐Free Lead Plating & Halogen Free
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
SYMBOL
Gate‐Source Voltage
Continuous Drain Current
TC = 25 °C TA= 25 °C(t≦10s)
TA= 25 °C(Steady‐State)
Pulsed Drain Current1
TC = 100 °C
Avalanche Current
Avalanche Energy Repetitive Avalanche Energy2
L = 0.1mH, IAS=‐25A, RG=25Ω
L = 0.