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N & P-Channel Logic Level Enhancement Mode Field Effect Transistor
Product Summary:
N-CH P-CH
BVDSS
30V
-30V
RDSON (MAX.) @VGS=10V 32mΩ 55mΩ
RDSON (MAX.) @VGS=4.5V 45mΩ 85mΩ
ID@TA=25°C
6A
-5A
N+P Channel MOSFET
UIS, Rg 100% Tested
Pb-Free Lead Plating & Halogen Free
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
SYMBOL
Gate-Source Voltage
VGS
Continuous Drain Current Pulsed Drain Current1
TA = 25 °C TA = 100 °C
Avalanche Current
Avalanche Energy
L = 0.1mH
Repetitive Avalanche Energy2
L = 0.05Mh
Power Dissipation
TA = 25 °C TA = 100 °C
Operating Junction & Storage Temperature Range
ID
IDM IAS EAS EAR PD
Tj, Tstg
EMB32C03V
LIMITS
N-CH
P-CH
±20
±20
6
-5
4
-3
24
-20
15
22
11
24
5.6
12
2.3
0.
EMB32C03V Datasheet
