Datasheet Details
| Part number | EMBA2A10VS |
|---|---|
| Manufacturer | Excelliance MOS |
| File Size | 443.01 KB |
| Description | Dual N-Channel Logic Level Enhancement Mode Field Effect Transistor |
| Datasheet |
 EMBA2A10VS Datasheet
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| Part number | EMBA2A10VS |
|---|---|
| Manufacturer | Excelliance MOS |
| File Size | 443.01 KB |
| Description | Dual N-Channel Logic Level Enhancement Mode Field Effect Transistor |
| Datasheet |
EMBA2A10VS Datasheet
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: N-CH BVDSS 100V RDSON (MAX.)@VGS=10V RDSON (MAX.)@VGS=4.5V 100mΩ 150mΩ ID @TC=25℃ 9.0A ID @TA=25℃ 3.0A Dual N Channel MOSFET UIS、Rg 100% Tested Pb-Free Lead Plating & Halogen Free ▪ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL Gate-Source Voltage Continuous Drain Current Continuous Drain Current Pulsed Drain Current1 TC = 25 °C TC = 100 °C TA = 25 °C TA = 70 °C Avalanche Current Avalanche Energy Repetitive Avalanche Energy2 L = 1mH L = 0.5mH Power Dissipation TC = 25 °C TC = 100 °C Power Dissipation TA = 25 °C TA = 70 °C Operating Junction & Storage Temperature Range VGS ID ID IDM IAS EAS EAR PD PD Tj, Tstg EMBA2A10VS LIMITS ±20 9 5 3 2 36 2.5 3.1 1.6 13.9 5.6 2.1 1.3 -55 to 150 UNIT V A mJ W W °C ▪THERMAL RESISTANCE RATINGS THERMAL RESISTANCE SYMBOL Junction-to-Case RθJC Junction-to-Ambient3 RθJA 1Pulse width limited by maximum junction temperature.
2Duty cycle < 1％ 360°C / W when mounted on a 1 in2 pad of 2 oz copper.
4Guarantee by Engineering test TYPICAL 2021/3/15 A.0 MAXIMUM 9 60 UNIT °C/W P.1 EMBA2A10VS ▪ELECTRICAL CHARACTERISTICS (TJ = 25 °C, Unless Otherwise Noted) PARAMETER SYMBOL TEST CONDITIONS MIN STATIC Drain-Source Breakdown Voltage4 Gate Threshold Voltage4 Gate-Body Leakage4 Zero Gate Voltage Drain Current4 On-State Drain Current1 Drain-Source On-State Resistance1,4 Forward Transconductance1 V(BR)DSS VGS(th) IGSS IDSS ID(ON) RDS(ON) gfs VGS = 0V, ID = 250uA 100 VDS = VGS, ID = 250uA 1 VDS = 0V, VGS = ±20V VDS = 80V, VGS = 0V VDS =70V, VGS =0V, TJ = 125 °C VDS = 10V, VGS = 10V 9 VGS = 10V, ID = 8A VGS = 4.5V, ID = 5A VDS = 5V, ID = 8A DYNAMIC Input Capacitance5 Output Capacitance5 Reverse Transfer Capacitance5 Gate Resistance4,5 Total Gate Charge1,2,5 Gate-Source Charge1,2,5 Gate-Drain Charge1,2,5 Turn-On Delay Time1,2,5 Rise Time1,2,5
Dual N-Channel Logic Level Enhancement Mode Field Effect Transistor ▪Product Summary: ▪.
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