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P-Channel Logic Level Enhancement Mode Field Effect Transistor
Product Summary:
D
BVDSS
-20V
RDSON (MAX.)
3.2mΩ
ID
-100A
G
UIS, Rg 100% Tested
S
RoHS & Halogen Free & TSCA Compliant
EMF02P02H
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS
SYMBOL
LIMITS
Gate-Source Voltage
VGS
±12
Continuous Drain Current1 Pulsed Drain Current2
TC = 25 °C
-100
ID
TC = 100 °C
-73
IDM
-400
Avalanche Current
IAS
-100
Avalanche Energy
L = 0.1mH, ID=-100A, RG=25Ω
EAS
500
Repetitive Avalanche Energy3
L = 0.05mH
EAR
250
Power Dissipation
TC = 25 °C TC = 100 °C
Operating Junction & Storage Temperature Range
PD Tj, Tstg
69 27 -55 to 150
100% UIS testing in condition of VD=-15V, L=0.