Datasheet4U Logo Datasheet4U.com

EMF20B02V - P-Channel Logic Level Enhancement Mode Field Effect Transistor

📥 Download Datasheet

Datasheet Details

Part number EMF20B02V
Manufacturer Excelliance MOS
File Size 852.57 KB
Description P-Channel Logic Level Enhancement Mode Field Effect Transistor
Datasheet download datasheet EMF20B02V Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
P-Channel Logic Level Enhancement Mode Field Effect Transistor Product Summary: BVDSS -20V RDSON (MAX.) 20mΩ ID -8.5A P Channel MOSFET UIS, Rg 100% Tested Pb-Free Lead Plating & Halogen Free ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL Gate-Source Voltage VGS Continuous Drain Current Pulsed Drain Current1 TA = 25 °C ID TA = 70 °C IDM Power Dissipation TA = 25 °C TA = 70 °C Operating Junction & Storage Temperature Range PD Tj, Tstg EMF20B02V LIMITS ±12 -8.5 -6 -34 2 1.28 -55 to 150 UNIT V A W °C THERMAL RESISTANCE RATINGS THERMAL RESISTANCE SYMBOL Junction-to-Case RJC Junction-to-Ambient3 RJA 1Pulse width limited by maximum junction temperature. 2Duty cycle  1% 362.