FORESEE NCLD3B1256M32
8Gb LPDDR3 SDRAM
FEATURES
[ FBGA ]● Operation Temperature - (-25)oC ~ 70 oC
● Package - 178-ball FBGA - 12.0x11.5mm2, 1.00t, 0.65mm pitch - Lead & Halogen Free 8Gb,16Gb: 178-Ball, LPDDR3 SDRAM [ LPDDR3 ]
● VDD1 = 1.8V (1.7V to 1.95V)
● VDD2, VDDCA and VDDQ = 1.2V (1.14V to 1.30)
● HSUL_12 interface (High Speed Unterminated Logic 1.2V)
● Double data rate architecture for command, address and data Bus; - all control and address except CS_n, CKE latched at both rising and falling edge of the clock - CS_n, CKE latched at rising edge of the clock - two data accesses per clock cycle
● Differential clock inputs (CK_t, CK_c)
● Bi-directional differential data strobe (DQS_t, DQS_c) - Source synchronous data transaction aligned to bi-directional differential data strobe (DQS_t, DQS_c) - Data outputs aligned to the edge of the data strobe (DQS_t, DQS_c) when READ operation - Data inputs aligned to the center of the data strobe (DQS_t, DQS_c) when WRITE operation
● DM masks write data at the both rising and falli...