Datasheet4U Logo Datasheet4U.com

CCD5061 - 6k x 128 Element Time Delay Integration Sensor

General Description

The CCD5061 is a 6144 pixel x 128 line, high speed TDI sensor.

The active imaging area is organized as 6144 vertical columns and 128 horizontal TDI rows.

The array is set up for bi-directional operation.

Key Features

  • 6144 pixels per line Number of TDI stages electronically selectable; 4, 8, 16, 32, 64, 96, 128 Bi-directional TDI (shift up or down) 4 outputs.
  • each capable of 20MHz data rate.
  • 80 MHz total data rate per side (shift up or down) 100% fill factor 8.75µm x 8.75 µm pixel size On-chip binning capability.

📥 Download Datasheet

Datasheet Details

Part number CCD5061
Manufacturer Fairchild Imaging
File Size 774.46 KB
Description 6k x 128 Element Time Delay Integration Sensor
Datasheet download datasheet CCD5061 Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
CCD5061 6K x 128 Element / TDI-Time / Delay and Integration Sensor Fairchild
CCD595 Front Illuminated 9k x 9k Full Frame CCD Image Sensor BAE Systems
CCD201-20 Electron Multiplying CCD Sensor E2V
CCD30-11 Open Electrode High Performance CCD Sensor e2v
CCDLF10000L SMT Data Line EMI Filter Coilcraft

Other Datasheets by Fairchild Imaging

Part Number Description
CCD5045 Time Delay Integration Line Scan Sensor
CCD525 Time Delay Integration Line Scan Sensor
CCD595 9216 x 9216 Pixel Image Area Full Frame CCD Image Sensor
CCD10121 12K x 128 Element Delay and Integration CCD
CCD133A 1024 Element High Speed Linear Image Sensor

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Fairchild Imaging CCD 5061 6k x 128 Element, Time Delay Integration Sensor PRODUCT DESCRIPTION The CCD5061 is a 6144 pixel x 128 line, high speed TDI sensor. The active imaging area is organized as 6144 vertical columns and 128 horizontal TDI rows. The array is set up for bi-directional operation. There are identical output registers and amplifiers on both the top and the bottom of the array. The outputs to be used (either top or bottom) are user-selectable and controlled by the vertical clock timing. In addition, the exposure level can be controlled by reducing the number of TDI rows from 128 to 96, 64, 32, 16, 8 or 4. This is also user-selectable and is accomplished by supplying the appropriate phasing for the vertical clocks within each section.