45N20B Datasheet | Fairchild Semiconductor

Description These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and mutation mode. These devices are well suited for high efficiency switching DC/DC converters, switch mode power supplies, DC-AC converters for uninterrupted power supply and motor control. Features - - - - - - 35A, 200V, RDS(on) = 0.065Ω @VGS = 10 V Low gate charge ( typical 133 n C) Low Crss ( typical 120 p F) Fast switching 100% avalanche tested Improved dv/dt capability G G DS TO-220 SSP Series GD S TO-220F SSS Series Absolute Maximum Ratings Symbol VDSS ID IDM VGSS EAS IAR EAR dv/dt PD TJ, TSTG TL TC = 25°C unless otherwise noted Parameter Drain-Source Voltage - Continuous (TC = 25°C) Drain Current - Continuous (TC = 100°C) Drain Current - Pulsed (Note 1) SSP45N20B 200 35 22.2 140 ± 30 (Note 2) (Note 1) (Note 1) (Note 3) SSS45N20B 35 - 22.2 - 140 - 650 35 17.6 5.5 Units V A A A V m J A m J V/ns W W/°C °C °C Gate-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC = 25°C) - Derate above 25°C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds 176 1.41 -55 to +150 300 57 0.45 - Drain current limited by maximum junction temperature. Thermal Characteristics Symbol RθJC RθCS RθJA Parameter Thermal Resistance, Junction-to-Case Max. Thermal Resistance, Case-to-Sink Typ. Thermal Resistance, Junction-to-Ambient Max. SSP45N20B 0.71 0.5 62.5 SSS45N20B 2.2 -62.5 Units °C/W °C/W °C/W ©2001 Fairchild Semiconductor Corporation Rev. A, November 2001 http://.. SSP45N20B/SSS45N20B Electrical Characteristics...