GENERAL DESCRIPTION
These full adders perform the addition of two 4-bit binary numbers. This provides the system designer with partial lookahead performance at the economy and reduced package count of a ripple-carry implementation. The adder logic, including the carry, is implemented in its true form meaning that the end-around carry can be accomplished without the need for logic or level inversion. FEATURES
s Full-carry look-ahead across the four bits s Systems achieve partial look-ahead performance with the economy of ripple carry s Typical add times Two 8-bit words 25 ns Two 16-bit words 45 ns s Typical power dissipation per 4-bit adder 95 mW Ordering Code: Order Number DM74LS283M DM74LS283N Package Number M16A N16E Package DESCRIPTION
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Fairchild Semiconductor
