GENERAL DESCRIPTION
Separate Latch Enable and Output Enable inputs are provided for each register to permit independent control of inputting and outputting in either direction of data flow. FEATURES
s Back-to-back registers for storage s Bidirectional data path s A and B outputs have current sourcing capability of 32 mA and current sinking capability of 64 mA s Separate control logic for each byte s 16-bit version of the ABT543 s Separate controls for data flow in each direction s Guaranteed latchup protection s High impedance glitch free bus loading during entire power up and power down cycle s Nondestructive hot insertion capability Ordering Code: Order Number 74ABT16543CSSC 74ABT16543CMTD Package Number MS56A MTD56 Package DESCRIPTION
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Devices also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Fairchild Semiconductor
