DESCRIPTION
If the device is enabled, 3 binary select inputs (A, B and C) determine which one of the outputs will PIN CONNECTION AND IEC LOGIC SYMBOLS April 1997 1/9 74AC138 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN No 1, 2, 3 4, 5 6 15, 14, 13, 12, 11, 10, 9, 7 8 16 SYMBOL A, B, C G2A, G2B G1 Y0 to Y7 NAME AND F UNCTIO N Address Inputs Enable Inputs Enable Input Outputs GND VCC Ground (0V) Positive Supply Voltage TRUTH TABLE INPUTS ENABL E G 2B G2A G1 C X X L X X H X X H X X X L L H L L L H L L L H L L L H L L L H H L L H H L L H H L L H H X: Don’t Care OUTPUTS SEL ECT B X X X L L H H L L H H A X X X L H L H L H L H Y0 H H H L H H H H H H H Y1 H H H H L H H H H H H Y2 H H H H H L H H H H H Y3 H H H H H H L H H H H Y4 H H H H H H H L H H H Y5 H H H H H H H H L H H Y6 H H H H H H H H H L H Y7 H H H H H H H H H H L LOGIC DIAGRAM This logic diagram has not be used to estimate propagation delays 2/9 74AC138 ABSOLUTE MAXIMUM RATINGS
Symbol VCC VI VO IIK IOK IO Tstg TL Supply V...
Fairchild Semiconductor
