GENERAL DESCRIPTION
The device is nibble controlled. Each nibble has separate 3-STATE control inputs which can be shorted together for full 16-bit operation. FEATURES
s Separate control logic for each byte s 16-bit version of the ACT240 s Outputs source/sink 24 mA s TTL-compatible inputs Ordering Code: Order Number 74ACT16240SSC 74ACT16240MTD Package Number MS48A MTD48 Package DESCRIPTION
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol Connection Diagram Pin Descriptions Pin Names OEn I0–I15 O0–O15 DESCRIPTION
Output Enable Inputs (Active LOW) Inputs Outputs FACT¥ is a trademark of Fairchild Semiconductor Corporation. © 2005 Fairchild Semiconductor Corporation DS500293 74ACT16240 Truth Tables Inputs OE1 L L H I0–I3 L H X Outputs O0–O3 H L Z OE2 L L H Inputs I4–I7 L H X Outputs...
Fairchild Semiconductor
