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74ACT377 - Octal D-Type Flip-Flop

Download the 74ACT377 datasheet PDF. This datasheet also covers the 74AC variant, as both devices belong to the same octal d-type flip-flop family and are provided as variant models within a single manufacturer datasheet.

General Description

The AC/ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs.

The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW.

The register is fully edge-triggered.

Key Features

  • s ICC reduced by 50% s Ideal for addressable register.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (74AC-377.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

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74ACT374 OCTAL D-TYPE FLIP-FLOP ON Semiconductor
74ACT374 Octal D-Type Flip-Flops Hitachi Semiconductor

Other Datasheets by Fairchild (now onsemi)

Part Number Description
74ACT373 Octal Transparent Latch
74ACT374 Octal D-Type Flip-Flop
74ACT323 8-Bit Universal Shift/Storage Register
74ACT399 Quad 2-Port Register
74ACT00 Quad 2-Input NAND Gate

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
74AC377 • 74ACT377 Octal D-Type Flip-Flop with Clock Enable November 1988 Revised November 1999 74AC377 • 74ACT377 Octal D-Type Flip-Flop with Clock Enable General Description The AC/ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time before the LOW-to-HIGH clock transition, is transferred to the corresponding flip-flop’s Q output. The CE input must be stable only one setup time prior to the LOW-to-HIGH clock transition for predictable operation.