GENERAL DESCRIPTION
A buffered Clock (CP) and Output Enable (OE) are common to all flipflops. FEATURES
s ICC and IOZ reduced by 50% s Edge-triggered D-type inputs s Buffered positive edge-triggered clock s 3-STATE outputs for bus-oriented applications s Outputs source/sink 24 mA s ACT534 has TTL-compatible inputs s Inverted output version of ACT374 Ordering Code: Order Number 74ACT534SC 74ACT534SJ 74ACT534PC Package Number M20B M20D N20A Package DESCRIPTION
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC Pin Descriptions Pin Names D0–D7 CP OE O0–O7 Data Inputs Clock Pulse Input 3-STATE Output Enable Input Complementary 3-STATE Outputs DESCRIPTION
FACT is a trademark of Fairchild Sem...
Fairchild Semiconductor
