74ACT715 Datasheet | Fairchild Semiconductor

Description The ACT715 and ACT715-R are 20-pin TTL-input patible devices capable of generating Horizontal, Vertical and posite Sync and Blank signals for televisions and monitors. All pulse widths are pletely definable by the user. The devices are capable of generating signals for both interlaced and noninterlaced modes of operation. Equalization and serration pulses can be introduced into the posite Sync signal when needed. Four additional signals can also be made available when posite Sync or Blank are used. These signals can be used to generate horizontal or vertical gating pulses, cursor position or vertical Interrupt signal. These devices make no assumptions concerning the system architecture. Line rate and field/frame rate are all a function of the values programmed into the data registers, the status register, and the input clock frequency. The ACT715 is mask programmed to default to a Clock Disable state. Bit 10 of the Status Register, Register 0, defaults to a logic “0”. This facilitates (re)programming before operation. The ACT715-R is the same as the ACT715 in all respects except that the ACT715-R is mask programmed to default to a Clock Enabled state. Bit 10 of the Status Register defaults to a logic “1”. Although pletely (re)programmable, the ACT715-R version is better suited for applications using the default 14.31818 MHz RS-170 register values. This feature allows power-up directly into operation, following a single CLEAR pulse. Features s Maximum Input Clock Frequency > 130 MHz s Interlaced and non-interlaced formats available s Separate or posite horizontal and vertical Sync and Blank signals available s plete control of pulse width via register programming s All inputs are TTL patible s 8 m A drive on all outputs s Default RS170/NTSC values mask programmed into registers s ACT715-R is mask programmed to default to a Clock Enable state for easier start-up into 14.31818 MHz RS170 timing Ordering Code: Order Number 74ACT715SC 74ACT715PC 74ACT715-RSC...