GENERAL DESCRIPTION
FEATURES
s Provides lookahead carries across a group of four ALUs s Multi-level lookahead high-speed arithmetic operation over long word lengths Ordering Code: Order Number 74F182SJ 74F182PC Package Number M16D N16E Package DESCRIPTION
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols Connection Diagram © 1999 Fairchild Semiconductor Corporation DS009492 74F182 Unit Loading/Fan Out Pin Names Cn G0, G2 G1 G3 P0, P1 P2 P3 Cn+x − Cn+z G P Carry Input Carry Generate Inputs (Active LOW) Carry Generate Input (Active LOW) Carry Generate Input (Active LOW) Carry Propagate Inputs (Active LOW) Carry Propagate Input (Active LOW) Carry Propagate Input (Active LOW) Carry Outputs Carry Generate Output (Active LOW) Carry Propagate Output (Active LOW) DESCRIPTION
U.L. HIGH/LOW 1.0/2.
Fairchild Semiconductor
