GENERAL DESCRIPTION
If an even number of inputs is HIGH, the Sum Even output is HIGH. If an odd number is HIGH, the Sum Even output is LOW. Ordering Code: Order Number 74F280SC 74F280SJ 74F280PC Package Number M14A M14D N14A Package DESCRIPTION
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC © 1999 Fairchild Semiconductor Corporation DS009512 74F280 Unit Loading/Fan Out Pin Names I0–I8 ∑O ∑E DESCRIPTION
Data Inputs Odd Parity Output Even Parity Output U.L. HIGH/LOW 1.0/1.0 50/33.3 50/33.3 Input IIH/IIL Output IOH/IOL 20 µA/−0.6 mA −1 mA/20 mA −1 mA/20 mA Truth Table Number of HIGH Inputs I0–I8 0, 2, 4, 6, 8 1, 3, 5, 7, 9 H = HIGH Voltage Level L = LOW Voltage Level Outputs ∑ Even H L...
Fairchild Semiconductor
