74LCX16500 Datasheet | Fairchild Semiconductor

74LCX16500 Low Voltage 18-Bit Universal Bus Transceivers with 5V Tolerant Inputs and Outputs March 1995 Revised April 1999 74LCX16500 Low Voltage 18-Bit Universal Bus Transceivers with 5V Tolerant Inputs and Outputs General Description These 18-bit universal bus transceivers bine D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes. Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. The LCX16500 is designed for low voltage (2.5V or 3.3V) VCC applications with the capability of interfacing to a 5V signal environment. The LCX16500 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining CMOS low power. Features s 5V tolerant inputs and outputs s 2.3V- 3.6V VCC specifications provided s 6.0 ns t PD max (VCC = 3.3V), 20 µA ICC max s Power down high impedance inputs and outputs s Supports live insertion/withdrawal (Note 1) s ±24 m A output drive (VCC = 3.0V) s Implements patented noise/EMI reduction circuitry s Latch-up performance exceeds 500 m A s ESD performance: Human body model > 2000V Machine model > 200V Note 1: To ensure the high-impedance state during power up or down, OE should be tied to VCC and OE tied to GND through a resistor: the minimum value or the resistor is determined by the current-sourcing capability of the driver. Ordering Code: Order Number 74LCX16500MEA 74LCX16500MTD Package Number MS56A MTD56 Package Description 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. © 1999 Fairchild Semiconductor Corporation DS012407.prf .fairchildsemi. Connection Diagram Truth Table (Note 2) Inputs OEAB L H H H H H H LEAB X H H L L L L CLKAB X X X ↓ ↓ H L An X L H L H...