74LS11 Datasheet | Fairchild Semiconductor

DM74LS11 Triple 3-Input AND Gate August 1986 Revised March 2000 DM74LS11 Triple 3-Input AND Gate General Description This device contains three independent gates each of which performs the logic AND function. Ordering Code: Order Number DM74LS11M DM74LS11N Package Number M14A N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Function Table Y = ABC Inputs A X X L H B X L X H C L X X H Output Y L L L H H = HIGH Logic Level L = LOW Logic Level...