Datasheet Details
| Part number | 74LS75 |
|---|---|
| Manufacturer | Fairchild (now onsemi) |
| File Size | 49.81 KB |
| Description | Quad Latch |
| Datasheet | 74LS75_FairchildSemiconductor.pdf |
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Overview: DM74LS75 Quad Latch August 1986 Revised March 2000 DM74LS75 Quad.
| Part number | 74LS75 |
|---|---|
| Manufacturer | Fairchild (now onsemi) |
| File Size | 49.81 KB |
| Description | Quad Latch |
| Datasheet | 74LS75_FairchildSemiconductor.pdf |
|
|
|
These latches are ideally suited for use as temporary storage for binary information between processing units and input/output or indicator units.
Information present at a data (D) input is transferred to the Q output when the enable is HIGH, and the Q output will follow the data input as long as the enable remains HIGH.
When the enable goes LOW, the information (that was present at the data input at the time the transition occurred) is retained at the Q output until the enable is permitted to go HIGH.
| Brand Logo | Part Number | Description | Manufacturer |
|---|---|---|---|
 |
74LS75 | Quadruple Bistable Latches | Hitachi Semiconductor |
 |
74LS75 | 4-BIT D LATCH | Motorola |
| Part Number | Description |
|---|---|
| 74LS73 | Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops |
| 74LS73A | Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops |
| 74LS74A | Dual Positive-Edge-Triggered D Flip-Flops |
| 74LS00 | Quad 2-Input NAND Gate |
| 74LS02 | Quad 2-Input NOR Gate |
| 74LS03 | Quad 2-Input NAND Gates |
| 74LS04 | Hex Inverting Gates |
| 74LS05 | Hex Inverters |
| 74LS08 | Quad 2-Input AND Gates |
| 74LS09 | Quad 2-Input AND Gates |