74LS85
Description
These 4-bit magnitude parators perform parison of straight binary or BCD codes. Three fully-decoded decisions about two, 4-bit words (A, B) are made and are externally available at three outputs. These devices are fully expandable to any number of bits without external gates. Words of greater length may be pared by connecting parators in cascade. The A > B, A < B, and A = B outputs of a stage handling less-significant bits are connected to the corresponding inputs of the next stage handling more-significant bits. The stage handling the leastsignificant bits must have a high-level voltage applied to the A = B input. The cascading path is implemented with only a two-gate-level delay to reduce overall parison times for long words.
Features s Typical power dissipation 52 m W s Typical delay (4-bit words) 24 ns
Ordering Code:
Order Number DM74LS85M DM74LS85N Package Number M16A N16E Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow...
