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74LVX161284A - Low Voltage IEEE 161284 Translating Transceiver

General Description

The LVX161284A contains eight bidirectional data buffers and eleven control/status buffers to implement a full IEEE 1284 compliant interface.

The device supports the IEEE 1284 standard, with the exception of output slew rate, and is intended to be used in an Extended Capabilities Port mode (ECP).

Key Features

  • s Supports IEEE 1284 Level 1 and Level 2 signaling standards for bidirectional parallel communications between personal computers and printing peripherals with the exception of output slew rate s Translation capability allows outputs on the cable side to interface with 5V signals s All inputs have hysteresis to provide noise margin s B and Y output resistance optimized to drive external cable s B and Y outputs in high impedance mode during power down s Inputs and outputs on cable side have inter.

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74LVX161284A Low Voltage IEEE 161284 Translating Transceiver June 1999 Revised July 2000 74LVX161284A Low Voltage IEEE 161284 Translating Transceiver General Description The LVX161284A contains eight bidirectional data buffers and eleven control/status buffers to implement a full IEEE 1284 compliant interface. The device supports the IEEE 1284 standard, with the exception of output slew rate, and is intended to be used in an Extended Capabilities Port mode (ECP). The pinout allows for easy connection from the Peripheral (A-side) to the Host (cable side). Outputs on the cable side can be configured to be either open drain or high drive (± 14 mA) and are connected to a separate power supply pin (VCCcable) to allow these outputs to be driven by a higher supply voltage than the A-side.