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74LVX373 - Low Voltage Octal Transparent Latch

General Description

The LVX373 consists of eight latches with 3-STATE outputs for bus organized system applications.

The latches appear transparent to the data when Latch Enable (LE) is HIGH.

When LE is LOW, the data satisfying the input timing requirements is latched.

Key Features

  • s Input voltage translation from 5V to 3V s Ideal for low power/low noise 3.3V.

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74LVX373 Low Voltage Octal Transparent Latch with 3-STATE Outputs June 1993 Revised April 2005 74LVX373 Low Voltage Octal Transparent Latch with 3-STATE Outputs General Description The LVX373 consists of eight latches with 3-STATE outputs for bus organized system applications. The latches appear transparent to the data when Latch Enable (LE) is HIGH. When LE is LOW, the data satisfying the input timing requirements is latched. Data appears on the bus when the Output Enable (OE) is LOW. When OE is HIGH, the bus output is in the high impedance state. The inputs tolerate up to 7V allowing interface of 5V systems to 3V systems. Features s Input voltage translation from 5V to 3V s Ideal for low power/low noise 3.