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74S139 - Decoder/Demultiplexer

Download the 74S139 datasheet PDF. This datasheet also covers the 74S138 variant, as both devices belong to the same decoder/demultiplexer family and are provided as variant models within a single manufacturer datasheet.

General Description

These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications, requiring very short propagation delay times.

In high-performance memory systems these decoders can be used to minimize the effects of system decoding.

Key Features

  • s Designed specifically for high speed: Memory decoders Data transmission systems s DM74S138 3-to-8-line decoders incorporates 3 enable inputs to simplify cascading and/or data reception s DM74S139 contains two fully independent 2-to-4-line decoders/demultiplexers s Schottky clamped for high performance s Typical propagation delay time (3 levels of logic) DM74S138 8 ns DM74S139 7.5 ns s Typical power dissipation DM74S138 245 mW DM74S139 300 mW Ordering Code: Order Number DM74S138N DM74S139N Pac.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (74S138-FairchildSemiconductor.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
74S133 13-Input NAND Gate SYC
74S134 12-INPUT POSITIVE-NAND GATES Fairchild
74S134 12-INPUT POSITIVE-NAND GATES Signetics
74S135 Quad Exclusive OR/NOR Gate Fairchild
74S135 Quad Exclusive OR/NOR Gate Signetics

Other Datasheets by Fairchild (now onsemi)

Part Number Description
74S138 Decoder/Demultiplexer
74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop
74S140 Dual 4-Input NSND Line Driver
74S153 Dual 1-of-4 Line Data Selector/Multiplexer
74S157 Quad 1 of 2 Line Data Selectors/Multiplexers

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
DM74S138 • DM74S139 Decoder/Demultiplexer August 1986 Revised April 2000 DM74S138 • DM74S139 Decoder/Demultiplexer General Description These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications, requiring very short propagation delay times. In high-performance memory systems these decoders can be used to minimize the effects of system decoding. When used with high-speed memories, the delay times of these decoders are usually less than the typical access time of the memory. This means that the effective system delay introduced by the decoder is negligible. The DM74S138 decodes one-of-eight lines, based upon the conditions at the three binary select inputs and the three enable inputs.