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74VCXH16240 - Low Voltage 16-Bit Inverting Buffer/Line Driver

General Description

The VCXH16240 contains sixteen inverting buffers with 3STATE outputs to be employed as a memory and address driver, clock driver, or bus oriented transmitter/receiver.

The device is nibble (4-bit) controlled.

Key Features

  • s 1.65V.
  • 3.6V VCC supply operation s 3.6V tolerant control inputs and outputs s Bushold on data inputs eliminates the need for external pull-up/pull-down resistors s tPD 2.5 ns max for 3.0V to 3.6V VCC 3.0 ns max for 2.3V to 2.7V VCC 6.0 ns max for 1.65V to 1.95V VCC s Static Drive (IOH/IOL) ±24 mA @ 3.0V VCC ±18 mA @ 2.3V VCC ±6 mA @ 1.65V VCC s Uses patented noise/EMI reduction circuitry s Latch-up performance exceeds 300 mA s ESD performance: Human body model > 2000V Machine model > 20.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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www.DataSheet4U.com 74VCXH16240 Low Voltage 16-Bit Inverting Buffer/Line Driver December 1999 Revised March 2000 74VCXH16240 Low Voltage 16-Bit Inverting Buffer/Line Driver with Bushold General Description The VCXH16240 contains sixteen inverting buffers with 3STATE outputs to be employed as a memory and address driver, clock driver, or bus oriented transmitter/receiver. The device is nibble (4-bit) controlled. Each nibble has separate 3-STATE control inputs which can be shorted together for full 16-bit operation. The VCXH16240 data inputs include active bushold circuitry, eliminating the need for external pull-up resistors to hold unused or floating inputs at a valid logic level. The 74VCXH16240 is designed for low voltage (1.65V to 3.