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74VCXH162835 - Low Voltage 18-Bit Universal Bus Driver

Datasheet Summary

Description

The VCXF162835 low voltage 18-bit universal bus driver combines D-type latches and D-type flip-flops to allow data flow in transparent, latched and clocked modes.

Data flow is controlled by output-enable (OE), latch-enable (LE), and clock (CLK) inputs.

Features

  • s Compatible with PC133 DIMM module specifications s 1.65V.
  • 3.6V VCC specifications provided s 3.6V tolerant outputs s 26Ω series resistors in outputs s tPD (CP to On) 3.2 ns max for 3.0V to 3.6V VCC 4.1 ns max for 2.3V to 2.7V VCC 7.4 ns max for 1.65V to 1.95V VCC s Power-down high impedance outputs s Static Drive (IOH/IOL) ±12 mA @ 3.0V VCC ±8 mA @ 2.3V VCC ±3 mA @ 1.65V VCC s Latchup performance exceeds 300 mA s ESD performance: Human body model > 2000V Machine model >200V Ordering Co.

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Datasheet Details

Part number 74VCXH162835
Manufacturer Fairchild Semiconductor
File Size 98.69 KB
Description Low Voltage 18-Bit Universal Bus Driver
Datasheet download datasheet 74VCXH162835 Datasheet
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Full PDF Text Transcription

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www.DataSheet4U.com 74VCXF162835 Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Outputs and 26Ω Series Resistors in Outputs October 1999 Revised April 2000 74VCXF162835 Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Outputs and 26Ω Series Resistors in Outputs General Description The VCXF162835 low voltage 18-bit universal bus driver combines D-type latches and D-type flip-flops to allow data flow in transparent, latched and clocked modes. Data flow is controlled by output-enable (OE), latch-enable (LE), and clock (CLK) inputs. The device operates in Transparent Mode when LE is held HIGH. The device operates in clocked mode when LE is LOW and CLK is toggled. Data transfers from the Inputs (In) to Outputs (On) on a Positive Edge Transition of the Clock.
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