GENERAL DESCRIPTION
All flip-flops are controlled by a common clock and a common clear. Information at the D inputs meeting the set-up time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. All inputs are protected from static discharge by diode clamps to VDD and VSS. FEATURES
s Wide supply voltage range: 3V to 15V s High noise immunity: 0.45 VDD (typ.) s Low power TTL compatibility: fan out of 2 driving 74L or 1 driving 74 LS s Equivalent to MC14174B, MC14175B s Equivalent to MM74C174, MM74C175 Ordering Code: Order Number Package Number Package DESCRIPTION
CD40174BCM M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow CD40174BCN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide CD40175BCM M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow CD40175BCN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Devices also available in Tape and Reel.
Fairchild Semiconductor
