Datasheet4U Logo Datasheet4U.com

DM74ALS640A - Inverting Octal Bus Transceiver

Datasheet Summary

Description

This inverting octal bus transceiver is designed for asynchronous two-way communication between data busses.

This device transmits data from the A bus to the B bus or from the B bus to the A bus depending upon the level at the direction control (DIR) input.

Features

  • s Advanced Oxide-isolated Ion-implanted Schottky TTL process s Switching performance is guaranteed over full temperature and VCC supply range s Switching performance specified at 50 pF s PNP input design reduces input loading Ordering Code: Order Number DM74ALS640AWM DM74ALS640AN Package Number M20B N20A Package.

📥 Download Datasheet

Datasheet preview – DM74ALS640A

Datasheet Details

Part number DM74ALS640A
Manufacturer Fairchild Semiconductor
File Size 48.07 KB
Description Inverting Octal Bus Transceiver
Datasheet download datasheet DM74ALS640A Datasheet
Additional preview pages of the DM74ALS640A datasheet.

📁 Similar Datasheet

  • DM74ALS1011A - Triple 3 Input AND Buffer (National)
  • DM74ALS1242 - Quad Bidirectional Bus Drivers (National Semiconductor)
  • DM74ALS1242A - Quad Bidirectional Bus Driver (National)
  • DM74ALS132 - DM74ALS132 Quad 2-Input NAND Gate with Schmitt Trigger Inputs (National Semiconductor)
  • DM74ALS138 - 3 to 8 Line Decoder/Demultiplexer (National Semiconductor)
  • DM74ALS14 - Hex Inverter with Schmitt Trigger Inputs (National Semiconductor)
  • DM74ALS151 - 1 of 8 Line Data Selector/Multiplexer (National Semiconductor)
  • DM74ALS1620 - Octal Tri-State Bus Transceivers (National)
  • DM74ALS390 - Dual 4-Bit Decade Counters (National Semiconductor)
  • DM74ALS996 - D Type Edge Triggered Readback Latches (National)
Other Datasheets by Fairchild Semiconductor

Full PDF Text Transcription

Click to expand full text
DM74ALS640A Inverting Octal Bus Transceiver August 1985 Revised February 2000 DM74ALS640A Inverting Octal Bus Transceiver General Description This inverting octal bus transceiver is designed for asynchronous two-way communication between data busses. This device transmits data from the A bus to the B bus or from the B bus to the A bus depending upon the level at the direction control (DIR) input. The enable input (G) can be used to disable the device so the busses are effectively isolated.
Published: |