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DM74KS112AM Datasheet

Manufacturer: Fairchild (now onsemi)
DM74KS112AM datasheet preview

Datasheet Details

Part number DM74KS112AM
Datasheet DM74KS112AM_FairchildSemiconductor.pdf
File Size 52.01 KB
Manufacturer Fairchild (now onsemi)
Description Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset/ Clear/ and Complementary Outputs
DM74KS112AM page 2 DM74KS112AM page 3

DM74KS112AM Overview

This device contains two independent negative-edge-triggered J-K flip-flops with plementary outputs. The J and K data is processed by the flip-flop on the falling edge of the clock pulse. The clock triggering occurs at a voltage level and is not directly related to the transition time of the falling edge of the clock pulse.

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