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DM74LS257B Datasheet PDF

Fairchild Semiconductor DM74LS257B

This 3-STATE output feature means that n-bit (paralleled) data selectors with up to 258 sources can be implemented for data buses. It also permits the use of standard TTL registers for data retention throughout the system.
Part No. DM74LS257B
Datasheet DM74LS257B Download
Manufacturer
Fairchild Semiconductor
Description 3-STATE Quad 2-Data Selectors/Multiplexers
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DM74LS257B datasheet page 1 preview

GENERAL DESCRIPTION

These Schottky-clamped high-performance multiplexers feature 3-STATE outputs that can interface directly with data lines of bus-organized systems. With all but one of the common outputs disabled (at a high impedance state), the low impedance of the single enabled output will drive the bus line to a HIGH or LOW logic level. To minimize the possibility that two outputs will attempt to take a common bus to opposite logic levels, the output enable circuitry is designed such that the output disable times are shorter than the output enable times.

FEATURES

s 3-STATE versions LS157 and LS158 with same pinouts s Schottky-clamped for significant improvement in A-C performance s Provides bus interface from multiple sources in high-performance systems s Average propagation delay from data input 12 ns s Typical power dissipation: 50 mW Ordering Code: Order Number DM74LS257BM DM74LS257BN Package Number M16A N16E Package

DESCRIPTION

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel.
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