FAN5063 Datasheet | Fairchild Semiconductor

Features - Implements ACPI control with PWROK, SLP_S3 and SLP_S5 - Switch and linear regulator controller for 3.3V Dual (PCI) - Linear regulator controller and linear regulator for VADJ Dual output adjustable from 2.5V to 3.5V - Break-before-Make - Drives all N-Channel MOSFETs plus NPN - Latched overcurrent protection for outputs - Power-up softstarts for the linear regulators - UVLO guarantees correct operation for all conditions - 16 pin SOIC package Description The FAN5063 is an ACPI Switch Controller for the Camino, Whitney and Tehama Platforms. It is controlled by PWROK, SLP_S3 and SLP_S5, and provides 3.3V Dual for PCI and VADJ Dual output for SDRAM or RAMBUS with 200m A minimum base current for an external NPN transistor. An onboard precision low TC reference achieves tight tolerance voltage regulation without expensive external ponents. The FAN5063 also offers integrated Current Limiting that protects each output, and softstart for the linear regulators. The FAN5063 is available in a 16 pin SOIC. Applications - Camino Platform ACPI Controller - Whitney Platform ACPI Controller - Tehama Platform ACPI Controller Block Diagram +5V Standby PWR_OK 9 SLP_S3 7 SLP_S5 8 3 1 2 16 +12V Softstart Osc +5V Main 15 Over Current +3.3V Main 4 14 + VADJ Dual (2.5V RAMBUS or 3.3V SDRAM) 13 + REF + 11 + REF 5 6 +5V Standby 12 REF +3.3V Dual (PCI) REV. 1.0.0 12/4/00 PRODUCT SPECIFICATION Pin Assignments QCAP PUMP 5VSTBY 3VOUT1 3VOUT2 3VFB SLP_S3 SLP_S5 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCCP 5VMAIN VADJOUT VADJ VADJFB GND SS PWR_OK Pin Definitions Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Pin Name QCAP PUMP 5VSTBY 3VOUT1 3VOUT2 3VFB SLP_S3 SLP_S5 PWR_OK SS GND VADJFB VADJ VADJOUT 5VMAIN VCCP Pin Function Description Charge pump cap. Attach flying capacitor between this pin and PUMP to generate high voltage from standby power. Charge pump switcher. 5V Standby. Apply +5V standby on this pin to run the circuit in standby mode. 3.3V main...