FAN5078 Datasheet | Fairchild Semiconductor

Features - - - - - - - - - - - - - - - PWM regulator for VDDQ (2.5V or 1.8) Linear LDO regulator generates VTT = VDDQ/2, 1.5A Peak sink/source capability AMT / M-state support Control to generate 5V USB ACPI drive and control for 5V DUAL generation 3.3V internal LDO for 3V-ALW generation 300 k Hz fixed frequency switching RDS(ON) current sensing or optional current sense resistor for precision over-current detect Internal synchronous boot diode mon Power Good signal for all voltages Input under-voltage lockout (UVLO) Thermal shutdown Latched multi-fault protection Precision reference output for ULDO controllers 24-pin 5 x 5 MLP package Description The FAN5078 DDR memory regulator bines a highefficiency Pulse-Width Modulated (PWM) controller to generate the memory supply voltage, VDDQ, and a linear regulator to generate termination voltage (VTT). Synchronous rectification provides high efficiency over a wide range of load currents. Efficiency is further enhanced by using the low-side MOSFET’s RDS(ON) to sense current. The VDDQ PWM regulator is a sampled current mode control with external pensation to achieve fast load-transient response and provide system design optimization. The VTT regulator derives its reference and takes its power from the VDDQ PWM regulator, output. The VTT termination regulator is capable of sourcing or sinking 1.5A peak currents. In S5 M1 mode, the VDDQ switcher, VTT regulator, and the 3.3V regulators remain on. S3 mode keeps these regulators on, but also turns on an external P-Channel to provide 5V USB. A single soft-start capacitor enables controlled slew rates for both VDDQ and 3.3V-ALW outputs. PGOOD bees true in S0 only after all regulators have achieved stable outputs. In S5 (EN = 0), the 3.3V internal LDO stays on while the other regulators are powered down. ta S hee t4U .co - - Desktop PC's Servers support Ordering Information Part Number FAN5078MPX m Applications - DDR VDDQ and VTT voltage generation with ACPI Temperature...