• Part: FAN6300
  • Description: Highly Integrated Quasi-Resonant Current Mode PWM Controller
  • Manufacturer: Fairchild Semiconductor
  • Size: 572.05 KB
Download FAN6300 Datasheet PDF
Fairchild Semiconductor
FAN6300
FAN6300 is Highly Integrated Quasi-Resonant Current Mode PWM Controller manufactured by Fairchild Semiconductor.
- Highly Integrated Quasi-Resonant Current Mode PWM Controller October 2008 FAN6300 Highly Integrated Quasi-Resonant Current Mode PWM Controller Features - High-Voltage Startup - Quasi-Resonant Operation - Cycle-by-Cycle Current Limiting - Peak-Current-Mode Control - Leading-Edge Blanking - Internal Minimum t OFF - Internal 2ms Soft-Start - Over-Power pensation - GATE Output Maximum Voltage - Auto-Recovery Short-Circuit Protection (FB Pin) - Auto-Recovery Open-Loop Protection (FB Pin) - VDD Pin & Output Voltage (DET Pin) OVP Latched Applications - AC/DC NB Adapters - Open-Frame SMPS Description The highly integrated FAN6300 PWM controller provides several Features to enhance the performance of flyback converters. A built-in HV startup circuit can provide more startup current to reduce the startup time of the controller. Once the VDD voltage exceeds the turn-on threshold voltage, the HV startup function is disabled immediately to improve power consumption. An internal valley voltage detector ensures the power system operates at Quasi-Resonant operation in widerange line voltage and any load conditions and reduces switching loss to minimize switching voltage on drain of power MOSFET. To minimize standby power consumption and light-load efficiency, a proprietary green-mode function provides off-time modulation to decrease switching frequency and perform extended valley voltage switching to keep to a minimum switching voltage. FAN6300 controller also provides many protection functions. Pulse-by-pulse current limiting ensures the fixed peak current limit level, even when a short circuit occurs. Once an open-circuit failure occurs in the feedback loop, the internal protection circuit disables PWM output immediately. As long as VDD drops below the turn-off threshold voltage, controller also disables PWM output. The gate output is clamped at 18V to protect the power MOS from high gate-source voltage conditions. The minimum t OFF time limit prevents the system...