FIN1048 - 3.3V LVDS 4-Bit Flow-Through High Speed Differential Receiver

Product Overview

Fairchild Semiconductor

Part number	FIN1048
Manufacturer	Fairchild Semiconductor
File Size	249.78 KB
Description	3.3V LVDS 4-Bit Flow-Through High Speed Differential Receiver
Datasheet	FIN1048 Datasheet
Additional preview pages of the FIN1048 datasheet.

This quad receiver is designed for high speed interconnect utilizing Low Voltage Differential Signaling (LVDS) technology.

The receiver translates LVDS levels, with a typical differential input threshold of 100mV, to LVTTL signal levels.

s Greater than 400Mbs data rate s Flow-through pinout simplifies PCB layout s 3.3V power supply operation s 0.4ns maximum differential pulse skew s 2.5ns maximum propagation delay s Low power dissipation s Power-Off protection s Fail safe protection for open-circuit, shorted and terminated conditions s Meets or exceeds the TIA/EIA-644 LVDS standard s Pin compatible with equivalent RS-422 and LVPECL devices s 16-Lead SOIC and TSSOP packages save space Ordering Code: Order Number FIN1048M FIN1048.

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Published: Mar 30, 2005 |