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FIN3385 - (FIN3383 - FIN3386) Low Voltage 28-Bit Flat Panel Display Link Serializers/Deserializers

Download the FIN3385 datasheet PDF. This datasheet also covers the FIN3383 variant, as both devices belong to the same (fin3383 - fin3386) low voltage 28-bit flat panel display link serializers/deserializers family and are provided as variant models within a single manufacturer datasheet.

General Description

The FIN3385 and FIN3383 transform 28 bit wide parallel LVTTL (Low Voltage TTL) data into 4 serial LVDS (Low Voltage Differential Signaling) data streams.

A phaselocked transmit clock is transmitted in parallel with the data stream over a separate LVDS link.

Key Features

  • s Low power consumption s 20 MHz to 85 MHz shift clock support s r1V common-mode range around 1.2V s Narrow bus reduces cable size and cost s High throughput (up to 2.38 Gbps throughput) s Internal PLL with no external component s Compatible with TIA/EIA-644 specification s Devices are offered 56-lead TSSOP packages Ordering Code: Order Number FIN3383MTD FIN3384MTD FIN3385MTD FIN3386MTD Package Number MTD56 MTD56 MTD56 MTD56 Package.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (FIN3383_FairchildSemiconductor.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number FIN3385
Manufacturer Fairchild (now onsemi)
File Size 576.48 KB
Description (FIN3383 - FIN3386) Low Voltage 28-Bit Flat Panel Display Link Serializers/Deserializers
Datasheet download datasheet FIN3385 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
www.DataSheet4U.com FIN3385 • FIN3383 • FIN3384 • FIN3386 Low Voltage 28-Bit Flat Panel Display Link Serializers/Deserializers October 2003 Revised April 2005 FIN3385 • FIN3383 • FIN3384 • FIN3386 Low Voltage 28-Bit Flat Panel Display Link Serializers/Deserializers General Description The FIN3385 and FIN3383 transform 28 bit wide parallel LVTTL (Low Voltage TTL) data into 4 serial LVDS (Low Voltage Differential Signaling) data streams. A phaselocked transmit clock is transmitted in parallel with the data stream over a separate LVDS link. Every cycle of transmit clock 28 bits of input LVTTL data are sampled and transmitted. The FIN3386 and FIN3384 receive and convert the 4/3 serial LVDS data streams back into 28/21 bits of LVTTL data.